Hi,
I just achieved a first significant step in porting the Atari Jaguar chipset to a FPGA.
Here are some videos :
http://www.youtube.com/watch?v=l6KWd-LPwKg
http://www.youtube.com/watch?v=Mk850f7ICVM
It is based on the original "netlists", i.e the source code of the Tom & Jerry chips, that have been available for some years now.
They are compiled and translated into Verilog using a custom tool, and slightly adapted to cope with FPGA's architecture.
Source code is available here : https://github.com/Torlus/JagNetlists
Here are some additional details :
The Jaguar "netlist", i.e the source code of the Tom & Jerry custom chips has been available for some time now, see http://www.atarimuseum.com/videogames/consoles/jaguar/jagmenu/jagfiles.htm
Some attempts have been made to "port" it to a FPGA, but I think this is the first one to go that far, i.e actually be able to run on a FPGA. The board used here is an Altera Nios-II Embedded Evaluation Kit (NEEK), Stratix-II edition. http://www.altera.com/products/devkits/altera/kit-niosii-2S60.html
A custom daughterboard has been designed to provide PS/2, DB9 Joystick connectors, audio output and 24-bit VGA.
It's a good way to celebrate the 20th anniversary of the Jaguar console 
Regards,
Greg